Versions Compared

Key

  • This line was added.
  • This line was removed.
  • Formatting was changed.

...

Code Block
root@n100:~# ./setPL.sh 10 15
**** Current PL values from 'turbostat'
cpu0: MSR_PKG_POWER_LIMIT: 0x4280c800dd8030 (UNlocked)
cpu0: PKG Limit #1: ENabled (6.000 Watts, 28.000000 sec, clamp ENabled)
cpu0: PKG Limit #2: ENabled (25.000 Watts, 0.002441* sec, clamp DISabled)
**** Setting PL1=10000000 and PL2=10000000 in /sys/class/powercap/intel-rapl/intel-rapl:0/constraint_*_power_limit_uw
**** PL1 and PL2 already enabled in MSR_PKG_POWER_LIMIT

**** New PL values from 'turbostat'
cpu0: MSR_PKG_POWER_LIMIT: 0x42807800dd8050 (UNlocked)
cpu0: PKG Limit #1: ENabled (10.000 Watts, 28.000000 sec, clamp ENabled)
cpu0: PKG Limit #2: ENabled (15.000 Watts, 0.002441* sec, clamp DISabled)
**** MCHBAR is 0xfedc0001
**** Current value of PACKAGE_RAPL_LIMIT_0_0_0_MCHBAR_PCU = 0x80000000:0x00000000
**** MMIO limit reg locked with PL1/PL2 disabled on previous invocation (expected)

10/15

12/24

Code Block
root@n100:~# ./setPL.sh 12 24
**** Current PL values from 'turbostat'
cpu0: MSR_PKG_POWER_LIMIT: 0x4280c800dd8030 (UNlocked)
cpu0: PKG Limit #1: ENabled (6.000 Watts, 28.000000 sec, clamp ENabled)
cpu0: PKG Limit #2: ENabled (25.000 Watts, 0.002441* sec, clamp DISabled)
**** Setting PL1=12000000 and PL2=24000000 in /sys/class/powercap/intel-rapl/intel-rapl:0/constraint_*_power_limit_uw
**** PL1 and PL2 already enabled in MSR_PKG_POWER_LIMIT
**** New PL values from 'turbostat'
cpu0: MSR_PKG_POWER_LIMIT: 0x4280c000dd8060 (UNlocked)
cpu0: PKG Limit #1: ENabled (12.000 Watts, 28.000000 sec, clamp ENabled)
cpu0: PKG Limit #2: ENabled (24.000 Watts, 0.002441* sec, clamp DISabled)
**** MCHBAR is 0xfedc0001
**** Current value of PACKAGE_RAPL_LIMIT_0_0_0_MCHBAR_PCU = 0x80000000:0x00000000
**** MMIO limit reg locked with PL1/PL2 disabled on previous invocation (expected)

Image Added